SummaryPosted: Oct 7, 2024Role Number:200571949Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.
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DescriptionAs a CPU Cache Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification. • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals. • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for formal verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance. • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power.Minimum QualificationsMinimum BS and 10+ years of relevant industry experienceKnowledge of microprocessor architectureKnowledge of Verilog and/or VHDLExperience with simulators and waveform debugging toolsKnowledge of logic design principles along with timing and power implicationsPreferred QualificationsExpertise in one or more of the following areas:Coherence protocols and interconnectsHigh performance (low latency, high bandwidth) design techniquesMemory subsystem queuing, scheduling; starvation and deadlock avoidanceSRAM design basicsMultiple clock/power domains and power management strategiesPrefetchers, replacement policiesDebug capabilitiesDFT strategiesError detection and correctionUnderstanding of low power microarchitecture techniquesUnderstanding of high-performance techniques and trade-offs in a CPU microarchitectureExperience in C or C++ programmingExperience using an interpretive language such as Perl or PythonAdditional RequirementsMoreApple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
